FEATURES1. Standard 8051 Instruction set, fast machine cycle
. Executes instructions six times faster than the traditional 8051
2. 8K Bytes Flash Program Memory
. Support “In Circuit Programming” (ICP) or “In System Programming” (ISP) for the Flash code
. Byte Write “In Application Programming” (IAP) mode is convenient as Data EEPROM access
. Code Protection Capability
3. 256 Bytes SRAM in the 8051 internal data memory area (IRAM)
4. Four System Clock type Selections
. Fast clock from 1~8 MHz Crystal
. Fast clock from Internal RC (7.3728 MHz)
. Slow clock from 32768 Hz Crystal
. Slow clock from Internal RC (24 KHz)
. System clock can be divided by 1/2/4/16 option
5. 8051 Standard Timer – Timer0/1/2
. 16-bit Timer0, also supports T0O clock output for Buzzer application
. 16-bit Timer1
. 16-bit Timer2, also supports T2O clock output for Buzzer application
6. 15-bit Time3
. Clock source is Slow clock
. Interrupt period can be clock divided by 32768/16384/8192/128 option
7. 8051 Standard UART
. One Wire UART option can be used for ISP or other application
8. Two independent "8+2" bits PWMs with prescaler/period-adjustment
9. SPI Interface
. Master or Slave mode selectable
. Programmable transmit bit rate
. Serial clock phase and polarity options
. MSB-first or LSB-first selectable
10. 14-Channel Touch Key (F5268 only)
11. 12-bit ADC with 10 Channels External Pin Input and 2 Channels Internal Reference Voltage
12. 11 Sources, 4-level Priority Interrupt
. Timer0/Timer1/Timer2/Timer3 Interrupt
. INT0/INT1 Falling-Edge/Low-Level Interrupt
. Port1 Pin Change Interrupt
. UART TX/RX Interrupt
. P3.7 (INT2) Interrupt
. ADC/Touch Key Interrupt
. SPI Interrupt
13. Pin Interrupt can Wake up CPU from Power-Down (Stop) mode
. P3.2/P3.3 (INT0/INT1) Interrupt & Wake-up
. P3.7 (INT2) Interrupt & Wake-up
. Each Port1 pin can be defined as Interrupt & Wake-up pin (by pin change)
14. Max. 22 Programmable I/O pins
. CMOS Output
. Pseudo-Open-Drain, or Open-Drain Output
. Schmitt Trigger Input
. Pin Pull-up can be Enable or Disable
15. Independent RC Oscillating Watchdog Timer
. 360ms/180ms/90ms/45ms Selectable WDT Timeout options
16. Five types Reset
. Power on Reset
. Selectable External Pin Reset
. Software Command Reset
. Selectable Watchdog Timer Reset
. Selectable Low Voltage Reset
17. 3-level Low Voltage Reset
. 1.8V/2.3V/2.9V (can be disabled)
18. 1-level Low Voltage Detect
. 2.3V (can be disabled)
19. Four Power Saving Operation Modes
. Fast/Slow/Idle/Stop Mode
20. On-chip Debug/ICE interface
. Use P3.0/P3.1 pin
. Share with ICP programming pin
21. Operating Voltage and Current
. VCC = 2.3V ~ 5.5V @FSYSCLK = 7.3728 MHz
. VCC = 1.7V ~ 5.5V @FSYSCLK = 3.6864 MHz
. ICC = 1.7µA @Stop mode, LVR enable, MODE3V = 0, PWRSAV = 1, VCC = 5V
. ICC = 0.5µA @Stop mode, LVR enable, MODE3V = 0, PWRSAV = 1, VCC = 3V
. ICC = 0.5µA @Stop mode, LVR enable, MODE3V = 1, PWRSAV = 1, VCC = 3V
22. Operating Temperature Range
. –40*C ~ +85*C
23. Package Types
. DIP 20-pin (300 mil)
. SOP 20-pin (300 mil)
. Skinny DIP 24-pin (300 mil)
. SOP 24-pin (300 mil)