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TM52F5024

Data Sheet
DS-TM52F5024_EV094.pdf

2024/10/21
User manual

Development Tools
T-Link-EV Board

BLOCK DIAGRAM


FEATURES
1.	Standard 8051 Instruction set, fast machine cycle
	Executes instructions six times faster than the standard 8051.
2.	Flash Program Memory
	16K Bytes (TM52F5024)
	Support “In Circuit Programming” (ICP) or “In System Programming” (ISP) for the Flash code
	Byte Write “In Application Programming” (IAP) mode is convenient as Data EEPROM access
	Code Protection Capability
	100 erase times at least
	10 years data retention at least
3.	256 Bytes EEPROM Memory
	50K erase times at least
	10 years data retention at least
4.	Total 512 Bytes SRAM (IRAM + XRAM) 
	256 Bytes IRAM in the 8051 internal data memory area
	256 Bytes XRAM in the 8051 external data memory area (accessed by MOVX Instruction)
5.	Two System Clock type selections
	Fast clock from Internal RC (FRC, 18.432 MHz)
	Slow clock from Internal RC (SRC,75 KHz)
	System Clock can be divided by 1/2/4/16 option
6.	8051 Standard Timer – Timer0/1/2
	16-bit Timer0, also supports T0O clock output for Buzzer application
	16-bit Timer1
	16-bit Timer2, also supports T2O clock output for Buzzer application
7.	15-bit Timer3
	Clock source is Slow clock or FRC/512
	Interrupt period can be clock divided by 262144/131072/65536/32768/16384/8192/4096/2048/1024/512/256/128/64/32/16/8 option
8.	UARTs
	UART1, 8051 standard UART
	UART2, the second UART
	With UART pin select option
 
9.	Two independent 16 bits PWMs with period-adjustment
	With PWM0/PWM1 Interrupt

10.	I2C interface (Master)

11.	12-bit ADC with 22 channels External Pin Input and 2 channels Internal Reference Voltage 
	Internal Reference Voltage: VBG 2.5V±1% @VCC=5V~2.5V, 25℃
	Internal Reference Voltage: 1/4VCC, VCC /201
	ADC reference voltage = 1.18/2.0/2.5/4V

12.	LCD Driver
	Software controlled COM00~05, COM10~17, COM30~37 (Max. 22 pins)
	1/2 LCD Bias

13.	14 Sources, 4-level priority Interrupt
	Timer0/Timer1/Timer2/Timer3 Interrupt
	INT0/INT1 pin Falling-Edge/Low-Level Interrupt
	All Pin Change Wake up Interrupt from Halt/Stop mode
	UART1/UART2 TX/RX Interrupt
	LVD Interrupt
	ADC Interrupt
	I2C Interrupt
	EEP write Finish Interrupt
	PWM0/PWM1 Interrupt

14.	Pin Interrupt can Wake up CPU from Halt/Stop mode
	P3.2/P3.3 (INT0/INT1) Interrupt & Wake up
	Each pin can be defined as Wake up interrupt pin (by pin change)

15.	Max. 22 Programmable I/O pins
	CMOS Output
	Pseudo-Open-Drain, or Open-Drain Output
	Schmitt Trigger Input
	Pin Pull-up / Pull-down can be Enabled or Disabled
	All pin with high sink (70mA@VCC=5V,VOL=0.1VCC) 

16.	Independent RC Oscillating Watch Dog Timer
	220ms/110ms/54ms/27ms selectable WDT timeout options

17.	Five types Reset
	Power on Reset
	Selectable External Pin Reset
	Selectable Watch Dog Reset
	Software Command Reset
	Selectable Low Voltage Reset
18.	16-level Low Voltage Detect 
	4.12V/3.94V/3.0V/3.63V/3.50V/3.32V/3.18V/3.03V/
2.87V/2.71V/2.56V/2.40V/2.26V/2.11V/1.95V/1.79V
19.	16-level Low Voltage Reset
	4.12V/3.94V/3.0V/3.63V/3.50V/3.32V/3.18V/3.03V/
2.87V/2.71V/2.56V/2.40V/2.26V/2.11V/1.95V/1.79V
20.	Five Power Operation Modes
	Fast/ Slow/ Idle/ Halt/ Stop mode
21.	Integrated 16-bit Cyclic Redundancy Check function
22.	Multiplication and division 
	8-bit Multiplier & Divider (standard 8051)
	16-bit Multiplier & Divider
	32-bit ÷ 16-bit Divider
23.	On-chip Debug/ICE interface
	Use P3.0/P3.1 pin or P0.0/P0.1 pin 
	Share with ICP programming pin
24.	Operating Voltage and Current
	VCC = 2.4V ~ 5.5V @FSYSCLK=18.432MHz (-40℃ ~ +105℃)
	ICC = 0.1µA @Stop mode, PWRSAV=1, VCC=3V
	ICC = 3µA @Halt mode, PWRSAV=1, VCC=3V
	ICC = 5µA @Idle mode, PWRSAV=1, VCC=3V

25.	Operating Temperature Range
	–40°C ~ +105°C
26.	Package Types
	24-pin SSOP (150 mil)
	20-pin SOP (300 mil)
	20-pin TSSOP (173 mil)
	16-pin SOP (150 mil)


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