TM89P52M

1.	Low power dissipation. 
	  1.5V/3V operating voltage range.
2.	Powerful instruction set. 
	  Binary addition, subtraction, BCD adjustment. BCD can be executed directly in addition, subtraction. 
	  4 bits x 4 bits Multiplier
	  Single-bit manipulation (set, reset, decision for branch).
	  Various conditional branches.
	  16 initial working registers and manipulators (can be extended to all RAM with Page Mode).
	  Look-up Table.
	  LCD driver data transfer. 
3.	ROM capacity.				16K		x 16 bits. 
	  Instruction ROM Max. capacity	16K		x 16 bits. 
	  Table ROM Max. capacity		24K/12K	x 8/16 bits.
4.	RAM capacity.				1280/640/320	x 4/8/16 bits.
	LCD Max. capacity			256/128/64	x 4/8/16 bits.
	STACK Max. capacity			16		x 16 bits.
	HL/ZR store Max. capacity		16/16		x 16 bits.
5.	With direct/index addressing mode in data RAM access. 
6.	LCD driver output.
	Max 832 LCD dots by 16 common outputs and 52 segment outputs.
	COM12~16 can be defined as SEG64~61 by mask option.
	SEG41~60 can be defined as IOB1~4, KI1~4, ELC, ELP, BZB, BZ, IOD1~4, IOC1~4 by mask option.
	O/P or STATIC, 1/2~1/16 Duty can be selected by mask option.
	1/2 ~1/5 Bias can be selected by mask option.
	Single instruction to turn off all segments.
	COM5~16 can be defined as CMOS or P_open drain type output by mask option.
	External regulator mode for VL1/2 by mask option.
7.	Input/output ports.
	Port IOA	4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as CX, RFC0~2 by mask option.
	Port IOB	4 pins (with internal pull-low), and can be defined as SEG41~44 by mask option.
	Port IOC	4 pins (with internal pull-low, low-level-hold, input signal chattering prevention circuitry), and can be defined as SEG57~60 by mask option.
	Port IOD	4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG53~56 by mask option.
8.	Interrupt function.
	External factors	5	(INT pin, Port IOA, IOC, IOD & KI input).
	Internal factors	5	(Pre-Divider, Timer1, Timer2, Timer3 & RFC).
9.	Built-in EL-light driver.
	ELC, ELP. Can be defined as SEG49, 50 by mask option.
10.	Built-in Alarm, clock or single tone melody generator.
	BZB, BZ. Can be defined as SEG51, 52 by mask option.
11.	Built-in resistance to frequency converter.
	CX, RFC0~2 can be defined as IOA1~4 by mask option.
12.	Built-in key matrix scanning function.
	KO1~KO16(Shared with SEG1~16)
	KI1~KI4. Can be defined as SEG45~48 by mask option.
13.	Three 6-bit programmable timers with programmable clock source. 
	Read out the content in anytime
	Merged 2 or 3 timers as 12-bit or 18-bit timer
	Used as counter for RFC
14.	Watchdog timer.
15.	Built-in voltage charge halver & pump circuit.
16.	Dual clock operation
	Slow clock oscillation can be defined as X’tal or external RC type oscillator by mask option.
	Fast clock oscillation can be defined as 3.58 MHz ceramic resonator, internal R or external R type oscillator by mask option.
17.	HALT function.
18.	STOP function.

*Timer / Calendar / Calculator / Thermometer