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TM57PE10

Data Sheet
DS-TM57PE10_EV18.pdf

2013/9/3
User manual
Development Documnets
AP Notes

Development Tools
TICE59NB(已停產)
TICE99
TWR98/TWR99/TWR100/TWR100A

GENERAL DESCRIPTION
TM57PE10是一個8位微控制器,採用CMOS製程,具有高效能、低耗電特點,其功能包含 
1K*14 bits OTP ROM,48-byte SRAM,8-bit timer,5-level stack,兩個
8-bit PWM,16個I/O pins。TM57PE10並提供dual clock,快速震盪可選擇外部
FXT或是FIRC,慢速震盪32K Xtal,當作RTC以及降低功耗。
BLOCK DIAGRAM


FEATURES
1.ROM: 1K x 14 bits OTP or 512 x 14 bits TTP™ (Two Time Programmable ROM)
2.RAM: 48 x 8 bits
3.STACK: 5 Levels
4.I/O ports: Two Bit programmable I/O ports (Max. 16 pins)
5.Two Independent Timers
  8-bit timer0 with divided by 1~256 pre-scale option, counter function, Stop counting
  15-bit timer2 with 4 interrupt interval option
  Timer2 is used to idle mode wake-up timer or one simple 15-bit time base
6.8-bit PWM0 with prescale/period-adjustment/buffer-reload/clear and hold function
7.8-bit PWM1 is a simple fixed frequency and duty cycle variable PWM generator
8.One analog voltage comparator
9.Min. Operating Voltage (power on) and Speed: VDD=1.5V, @4 MHz
10.PA1~PA6, PB1~PB6 individual pin low level wake up
11.Oscillation Sources
   Fast Clock:
   - FXT (Fast Crystal): 1 MHz~24 MHz
   - FIRC (Fast Internal RC): 4/8 MHz
   - XRC (External R, External C): 10 KHz~3 MHz
   Slow Clock:
   - SXT (Slow Crystal): 32768 Hz
   - XRC (External R, External C): 10 KHz~3 MHz
   - SIRC (Slow Internal RC): 151 KHz/37 KHz/9.4 KHz/2.4 KHz, @5V; 115 KHz/29 KHz/7.2 KHz/1.9 KHz, @3V
12.Power Saving Operation Mode
   Fast Mode: Slow Clock can be disabled or enabled
   Slow Mode: Fast Clock stops, CPU is running
   Idle Mode: Slow Clock is running, CPU stops, Timer2 is running
   Stop Mode: All Clocks stop, Wake-up Timer is disabled or enabled
13.Dual System Clock
   FIRC + SIRC
   FIRC + SXT
   FIRC + XRC
   FXT + SIRC
   XRC + SIRC
14.Reset
   Power On Reset
   Watchdog Reset
   Low Voltage Reset
   External pin Reset
15.2-Level Low Voltage Reset: 1.5V/2.3V (Can be disabled)
16.Operation Voltage: Low Voltage Reset Level to 5.5V
   - fosc = 4 MHz, 1.7V ~ 5.5V
   - fosc = 8 MHz, 1.9V ~ 5.5V
   - fosc = 12 MHz, 2.1V ~ 5.5V
   - fosc = 16 MHz, 2.3V ~ 5.5V
17.Interrupt
   Three External Interrupt pins:
   - Two pins are falling edge triggered
   - One pin is rising or falling edge triggered
   Timer0, Timer2, Wake-up Timer Interrupt
   PWM0, CMP interrupt
18.Watchdog Timer
   Clocked by built-in RC oscillator with 4 adjustable Reset/Interrupt Time
   (108 ms/56 ms/28 ms/14 ms, @5V; 138 ms/72 ms/36 ms/18 ms, @3V)
   Watchdog timer can be disabled/enabled in STOP mode
19.I/O Ports
   CMOS Output
   Pseudo-Open-Drain or Open-Drain Output
   Schmitt Trigger Input with/without pull-up resistor
20.Instruction set: 36 Instructions
21.Package Types: 14-DIP/SOP, 16-DIP/SOP, 18-DIP/SOP


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