GENERAL DESCRIPTIONTM52 series F2280 and F2284 are versions of a new, fast 8051
architecture for an 8-bit microcontroller single chip with an
instruction set fully compatible with industry standard 8051,
C language development platform, and retains most 8051 peripheral
functional block. Typically, the TM52-F2280/84 executes instructions
six times faster than the traditional 8051 architecture.
The TM52-F2280/84 provides improved performance, lower cost and
fast time-to-market by integrating features on the chip, including
8K Bytes Flash program memory, 512 Bytes SRAM, Low Voltage Reset
(LVR1/2), Low Battery Detector (LBD), dual clock power saving
operation mode, SPI Interface, 8051 standard UART and Timer0/1/2,
adjustable real time Timer3, LCD/LED driver, 15 channels Touch Key
with ATK (F2280 only), 6-bit SAR ADC, Resistance to Frequency
Converter (RFC) and Watchdog Timer. Its high reliability and low
power consumption feature can be widely applied in consumer and
home appliance products.
FEATURES1. Standard 8051 Instruction set, fast machine cycle
. Executes instructions six times faster than the traditional 8051.
2. 8K Bytes Flash Program Memory
. Support “In Circuit Programming” (ICP) or “In System Programming” (ISP) for the Flash code
. Byte Write “In Application Programming” (IAP) mode is convenient as Data EEPROM access
. Code Protection Capability
3. Total 512 Bytes SRAM (IRAM + XRAM)
. 256 Bytes IRAM in the 8051 internal data memory area
. 256 Bytes XRAM in the 8051 external data memory area (accessed by MOVX Instruction)
4. Five System Clock type Selections
. Fast clock from Crystal (FXT, 1~8 MHz)
. Fast clock from Internal RC (FRC, 7.3728 MHz @VBAT = 2.2V ~ 5.5V)
. Fast clock from External RC (RFC)
. Slow clock from Crystal (SXT, 32768Hz)
. Slow clock from Internal RC (SRC, 80KHz @VDD = 3V, 40KHz @VDD = 1.5V)
. System Clock can be divided by 1/2/4/8/16/32 option
. System Clock output pin (TCO) for EL / IR application
5. 8051 Standard Timer – Timer0 / 1 / 2
. 16-bit Timer0, also supports RFC or SXT clock input counting
. 16-bit Timer1, also supports T1O / T1B clock output for Buzzer / IR application
. 16-bit Timer2, also supports T2O clock output for Buzzer / IR application
6. 23-bit Timer3 used for Real Time 32768Hz Crystal counting
. ± 0.5 ppm ~ 61 ppm interrupt rate adjustable
. MSB 8-bit overflow auto-reload
. 0.25 sec, 0.5 sec, 1.0 sec or overflow Interrupt
7. 15-Channel Touch Key (F2280 only)
. 1~4 Key H/W Auto Scan Mode (ATK), Sensitivity Adjustable for each Key
. Interrupt / Wake-up CPU while Key Pressed
8. 6-bit ADC for low pin count key scan
. Up to 100KHz conversion rate
9. Resistance to Frequency Converter (RFC)
. RFC clock divided by 1/4/16/64 signal can be assigned as Timer0 event count input
. RFC clock can be used as System clock source
10. 8051 Standard UART
. One Wire UART option can be used for ISP or other application
11. SPI Interface
. Master or Slave mode selectable
. Programmable transmit bit rate
. Serial clock phase and polarity options
. MSB-first or LSB-first selectable
12. 11-Sources, 4-level priority Interrupt
. Timer0 / Timer1 / Timer2 / Timer3 Interrupt
. INT0 / INT1 Falling-Edge / Low-Level Interrupt
. Port1 Pin Change Interrupt
. UART TX/RX Interrupt
. P2.7 (INT2) Interrupt
. Touch Key Interrupt
. SPI Interrupt
13. Pin Interrupt can Wake up CPU from Power-Down (Stop) mode
. P3.2 / P3.3 (INT0 / INT1) Interrupt & Wake-up
. P2.7 (INT2) Interrupt & Wake-up
. Each Port1 pin can be defined as Interrupt & Wake-up pin (by pin change)
14. Max. 32 Programmable I/O pins
. CMOS Output
. Pseudo-Open-Drain, or Open-Drain Output
. Schmitt Trigger Input
. Pin Pull-up can be Enabled or Disabled
15. LCD Controller / Driver
. 1/3 ~ 1/8 Duty
. 3 ~ 8 COM and 10 ~ 27 SEG selectable
. VLCD (VL3) = VBAT*3/5 ~ VBAT*5/5 (16 steps for Brightness adjustment)
. 1/3 LCD Bias, VL1 = VLCD/3, VL2 = VLCD*2/3
. Frame Rate: 40~90Hz
16. LED Controller / Driver
. 1/3 ~ 1/4 Duty
. Max. 4 COM x 10 SEG
. 40 mA High Sink COM, Active Low
. Active High or Active Low Segment output
17. BandGap Voltage Reference for Low Battery Detection (LBD)
. Detect VBAT voltage level from 2.4V to 4.5V
18. Built-in tiny current LDO Regulator for chip internal power supply (VDD)
. VDD voltage level can be set to 0.5*VBAT ~ 0.66*VBAT in different mode
19. Watch Dog Timer based on System Clock
. Running in Fast / Slow Mode, Stop counting in Idle / Stop Mode
. 32K or 64K counts overflow Reset
20. Six types Reset
. Power on Reset
. Selectable External Pin Reset
. Selectable Watch Dog Reset
. Software Command Reset
. Selectable Battery Low Voltage Reset #1 (LVR1, when VBAT < 1.6V)
. Selectable Battery Low Voltage Reset #2 (LVR2, when VBAT < 2.4V ~ 4.5V)
21. 4 Power Operation Modes
. Fast / Slow / Idle / Stop Mode
22. On-chip Debug / ICE interface
. Use P1.2 / P1.3 pin
. Share with ICP programming pin
23. Operating Voltage and Current
. VBAT = 2.0V ~ 5.5V
. 1.1uA LCD Current @VBAT = 3V
. 0.1uA LVR1 Current @VBAT = 3V
. 1.1uA SXT/SRC and System Clock Current @VDD = 1.5V
. 0.5uA Touch Key Current @VBAT = 3V
. Total 2.8uA Idle mode Current with LCD on, LVR1 on and TK scan @VBAT = 3V, VDD = 1.5V
24. Operating Temperature Range
. –40°C ~ +85°C
25. 48-pin LQFP Package