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TR3001

Data Sheet
DS-TR3001_EV11.pdf

2011/12/30
User manual
Development Documnets
AP Notes

GENERAL DESCRIPTION
The TR3001 is phase-locked loop (PLL) LSIs for FM stereo transmission 
application. All functions are controlled through 3 serial bus lines.
BLOCK DIAGRAM


FEATURES
1. Operate at input frequency ranging from 30~150 MHz during FMIN input . 
2. All functions controlled through 3 serial bus lines. 
3. CMOS structure with operating power supply rang of VDD=2.4~3.6V.


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