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TR3002

Data Sheet
DS-TR3002_EV11.pdf

2011/12/30
User manual
Development Documnets
AP Notes

GENERAL DESCRIPTION
The TR3002 is phase-locked loop (PLL) LSIs for general  purpose application. All 
functions are controlled through 2 serial bus lines.
BLOCK DIAGRAM


FEATURES
1. Operate at input frequency ranging from 1.5~150 MHz during FMIN input . 
2. All functions controlled through 2 serial bus lines. 
3. CMOS structure with operating power supply rang of VDD=2.2~3.6V. 


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