FEATURESLow power dissipation.
1.5V/3V operating voltage range.
TM87ML28L 1.5V Power Mode
TM87ML28H 3V Power Mode
2. Powerful instruction set.
Binary addition, subtraction, BCD. BCD can be executed directly in addition, subtraction.
Single-bit manipulation (set, reset, decision for branch).
Various conditional branches.
16 initial working registers and manipulators. (can be extended to all RAM by Page Mode)
Table look-up.
LCD driver data transfer.
3. ROM(MTP) capacity. 8K x 16 bits.
Instruction ROM Max. capacity 8K x 16 bits.
Table ROM Max. capacity 8K x 8 bits.
Endurance: 50000 cycles (min.)
Built-in Table ROM Word Write by Instruction in 3V Power Mode
4. RAM capacity. 1024 x 4bits.
5. With direct/index addressing mode in data RAM access.
6. LCD driver output.
Max 423 LCD dots by 9 common outputs and 47 segment outputs.
SEG24~47 can be defined as IOA1~4/CX,RFC0~2 , IOB1~4/ELC,ELP,BZB,BZ , IOC/KI1~4,IOD1~4,IOE1~4,IOF1~4 by code option.
1/1~1/9 Duty can be selected by code option.
1/2 ~1/3 Bias can be selected by code option.
Single instruction to turn off all segments.
COM1~9,SEG1~47 can be defined as CMOS or P_open drain type output by code option.
COM5~9 can be defined as SEG52~48 by code option.
Built-in regulator mode for VL1/2 by code option.
7. Input/output ports.
Port IOA 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG24~27/ CX,RFC0~2 or CX,RFC0~2/ ELC,ELP,BZB,BZ /SDA,SCL,RXD,TXD by code option.
Port IOB 4 pins (with internal pull-low), and can be defined as SEG28~31/ ELC,ELP,BZB,BZ by code option.
Port IOC 4 pins (with internal pull-low, low-level-hold, input signal chattering prevention circuitry), and can be defined as SEG32~35 / KI1~4 by code option.
Port IOD 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG36~39 by code option.
Port IOE 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG40~43 or RFC3~5,CX2/ELC,ELP,BZB,BZ/SIOX,SIOY,SCK,SSB by code option..
Port IOF 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG44~47 by code option.
8. Interrupt function.
External factors 6(INT pin, SIO, Port IOA, IOC, IOD & KI input).
Internal factors 4(Pre-Divider, Timer1, Timer2, Timer3 & RFC).
9. Built-in EL-light driver.
ELC, ELP. Can be defined as SEG28,29/IOB1,2 or CX,RFC0/IOA1,2/SCA,SCL or RFC3,4/IOE1,2/MOSI,MISO by code option.
10. Built-in Alarm, clock or single tone melody generator.
BZB, BZ. Can be defined as SEG30,31/IOB3,4 or RFC2,3/IOA3,4/RXD,TXD or RFC5,CX2/IOE3,4/SCK/SSB by code option.
11. Built-in resistance to frequency converter.
CX,RFC0~2 Can be defined as SEG24~27/IOA1~4 or IOA1~4/ELC,ELP,BZB,BZ / SDA,SCL,RXD,TXD by code option.
RFC3~5,CX2 Can be defined as IOE1~4/ELC,ELP,BZB,BZ/SIOX,SIOY,SCK,SSB by code option.
12. Built-in key matrix scanning function.
KO1~KO16(Shared with SEG1~16)
KI1~KI4. Can be defined as SEG32~35/IOC1~4 by code option.
13. Built-in Serial Interface (UART/SPI/I2C).
SDA,SCL,RXD,TXD Can be defined as CX,RFC0~2/IOA1~4/ELC,ELP,BZB,BZ by code option.
SIOX,SIOY,SCK,SSB Can be defined as RFC3~5,CX2/IOE1~4/ELC,ELP,BZB,BZ by code option.
14. Three 6-bit programmable timers with programmable clock source.
Read out the content in anytime
Merge 2 or 3 timer as 12-bits or 18-bits timer by STM instruction.
Extend 1 timer as 12-bits timer by STE instruction.
15. Watch dog timer & Key-Reset (No initial LCD, CMOS, and P_open drain type output data after reset by Watchdog timer or Key-Reset, and need select “OFF” for code option of “LCD Display in Reset Cycle”.)
16. Built-in voltage charge halver & pump circuit.
17. Dual clock operation
slow clock oscillation can be defined as X’tal or external RC type oscillator by code option.
fast clock oscillation can be defined as 3.58MHz ceramic resonator, internal R or external R type oscillator by code option.
18. HALT function.
19. STOP function.
20. Built-in Low Battery Detect.
21. Built-in Low Voltage Reset.